gate pulse
英 [ɡeɪt pʌls]
美 [ɡeɪt pʌls]
门脉冲；选通脉冲
双语例句
- Gate pulse monostable multivibrator
门脉冲单稳多谐振荡器 - The synchronous machine based on Field Programmable Gate Array ( FPGA) is combined with the integrate circuit and transistor, to realize multiplex pulse and step-signals synchronized with input signal.
该同步机以FPGA为核心，与集成电路、晶体管分立元件相结合，实现对输入脉冲触发转换、脉冲成形以及驱动输出，最终产生多路同步触发信号。 - Travel distance to exit Tracking gate ( range reference pulse)
至太平门的疏散距离跟踪波门（距离基准脉冲） - A surge of electrical power in one direction. gate pulse monostable multivibrator
脉冲电力的单向涌动门脉冲单稳多谐振荡器 - Tracking gate ( range reference pulse)
跟踪波门（距离基准脉冲） - Low time jitters gate used for singling out one pulse from repetitive pulses
低时间晃动的重复脉冲单次化门电路 - The circuit simulation shows that the symmetric strobe design ensures that the sampling interval is 100 ps and the sampling gate bandwidth is 4.4 GHz when the strobe pulse width is 100 ps. The gate can be used in multi-beam ultrashort laser pulses sampling.
电路仿真结果表明，对称的选通设计保证了选通脉宽为100ps时，取样间隔也为100ps，取样门带宽为4.4GHz，可应用于多路超短激光脉冲取样。 - The results show that the electron temperature comes to a head in the channel under the gate, it will achieve 6223 K when the height of the pulse is-18 V. then it falls around gradually towards the lattice temperature ( 300 K).
结果表明，在器件的栅下靠近漏端一侧的沟道处电子温度最高，当栅脉冲电压为-18V时可达6223K，并且电子温度从最高点向四周逐渐降低最后与晶格温度（300K）达到一致。 - Frequency characteristic of single tube sampling gate acted by cosinusoidal model sampling pulse
余弦型取样脉冲作用下单管取样门的频率特性 - This paper puts forward a method of using CMOS chip of delay and ECL gate to generate short pulse, and analyzes the principle of generation.
提出了使用延时芯片和ECL门产生极窄脉冲的方法，并对其产生原理做了理论分析。 - An application of MATH on deducing the nonlinear coupling differential equations of the BJT-Not gate, which is stimulated by rectangle pulse signal and is developed from Ebers-Moll equations is presented.
从Ebers－Moll方程组出发，建立在矩形脉冲激励下的BJT反相器的非线性耦合微分方程.介绍了MATH程序语言在求解逻辑门开关电路的非线性耦合微分方程中的具体应用。 - Combine with the direct digital synthesizer ( DDS) technology, use field programmable gate array ( FPGA) chip as control unit, directly generate the sine pulse width modulation ( SPWM).
本文主要描述利用FPGA现场可编程门阵列器件作为控制核心，结合DDS数字频率合成技术直接形成SPWM脉宽调制波。 - The scheme accomplishes range tracking by adopting three range gate tracking to make middle gate always centered at echo pulse center through feedback circuit and deviation calculation circuit.
该方案采用三波门跟踪，通过偏差计算电路和反馈控制电路使中间波门中心始终对准目标回波脉冲中心，完成距离跟踪。 - The location system is particularly developed by FPGA ( Field Programmable Gate Array), which can complete the functions such as the accurate counting and the noise processing about the feedback pulse from raster ruler, and execute the fast trigger on the synchronization signal generator.
定位系统设计开发中应用FPGA可编程器件，实现了对光栅返回脉冲的噪声信号处理，可靠计数、锁存和同步信号的实时触发功能。 - Serial port communication was achieved by adopting VC++ program, which was used in controlling power's "on/ off", gate signal's" on/ off", PWM ( Pulse Width Modulation) percentage and PWM frequency.
该方案是采用VC++编程实现串口通信（SPC），用于控制激光微焊接中激光能源的开关、门信号的开关、PWM百分比和PWM频率。 - In GaN HEMT gate pulse experiments, drain current under pulse conditon collapsed about 47% than direct current condition and the pulse width affected little on current collapse.
在GaNHEMT栅极脉冲电流崩塌测试中，观察到栅脉冲条件下漏极电流比直流情况下减小了47%； - When gate voltage is small, the relationship between pulse width and drain current is I0(δ+ γ T/ 16).
当栅压较小时，随着脉冲宽度的改变漏极电流按I0（δ+γT/16）的规律变化。 - Chapter 3 presents the details of various components of SVC control and protection systems of SVCs, such as measurement system, voltage regulator, gate pulse generator, synchronous system and supplemental control ect.
第三章介绍了一个常规SVC控制器系统中的各类组件，如测量系统、电压调整器、门极脉冲发生器、同步系统和补充控制及保护功能。 - NMOSFET ′ s after hot hole injection followed by hot electron injection produce serious degradation, which can be explained by neutral electron trap model and hot carrier induced gate oxide degradation under pulse stress.
NMOSFET′s在热空穴注入后，热电子随后注入时，会有大的退化量，这可以用中性电子陷阱模型和脉冲应力条件下热载流子注入引起的栅氧化层退化来解释。 - The pulse generator produces class gaussian narrow pulse using the competition adventure role of logic gate, and then gets a first order gaussian pulse through the first order differential circuit.
该脉冲发生器利用逻辑门的竞争冒险作用产生类高斯脉冲的窄脉冲，然后通过一阶微分电路来获得一阶高斯脉冲。 - Multi-period synchronous frequency measurement method realized the synchronization of gate signal of frequency measurement and the measured pulse signal, eliminating the measured signal error of ± 1 counts.
多周期同步测频法由于实现了测频的闸门信号与被测脉冲信号的同步，消除了被测信号的±1个计数误差。 - In this prescaler, no glitch generate at switching, due to the change of switching order. And nor gate is introduced in phase-switching-control circuit to avoid the generation of extra pulse completely.
本预分频器通过改变相位切换电路中的切换顺序，完全避免了切换产生的错误毛刺的产生；切换控制电路中采用或非门产生相位切换控制信号，有效防止了多余脉冲的产生。 - In addition, the performance of XOR logic gate can be improved by additional control pulse. However, the increase of control pulse power would deteriorate the output signal, and then the control pulse power should be chosen properly.
增加控制脉冲，可以提高逻辑异或门的性能，但同时，控制脉冲功率的增加也会使输出信号恶化，因此需要合理选择控制脉冲的功率。